1. Field
Example embodiments relate to a semiconductor memory device, and more particularly, to a semiconductor memory device having a memory cell without a capacitor, and a method of arranging a memory cell array thereof.
2. Description of Related Art
In general, a memory cell of a dynamic semiconductor memory device includes one cell capacitor and one access transistor. Efforts have been made to increase capacity of semiconductor memory devices without increasing layout area, for example, by using dynamic memory cells having a floating body transistor without a capacitor. As a result, it is possible to fabricate improved integration density memory cells compared to conventional dynamic semiconductor memory devices. However, depending on the charge storage mechanism used (e.g., impact ionization), a device with a shared source/drain line connection (e.g., bit line) may be disturbed by an operation of another device sharing the source/drain.